Registered Dual In-Line Memory Module Registered DIMM (RDIMM) buffers the address and control lines on the Dual In-Line Memory Module Registered DIMM (DIMM) to reduce signal loading. An SSTE32882 registering clock driver can be designed as a registered buffer to drive the address and control lines for DDR3 (Double Data Rate 3) RDIMM applications.
Joint Electron Device Engineering Councils (JEDEC) provides a standard which defines a number of configurable registers (control words) for the SSTE32882, such as “JEDEC standard (proposed), Definition of the SSTE32882 Registering Clock Driver with Parity for DDR3 RDIMM Applications”. The control words can be used to optimize the operations of the registering clock driver for different applications. For example, based on the setting of the registers the registering clock driver can change its output characteristics such as timing, driven strength and skew, etc., to match different DIMM net topologies.
The SSTE32882 registering clock driver has sixteen control words. The functions of control words 0 to 5 are defined by the JEDEC standard, and the control words 8 to 15 are reserved for future use. The control words 6 and 7 are vendor specific. The JEDEC standard defines the write operations for these control words, but does not provide read operations for the control words.